1. Origin of the Invention
This invention was conceived by a sole inventor to solve a heretofore unsolved problem. A method, apparatus and product by process pertaining to electro-depositing copper on the hole walls of high aspect ratio holes drilled in electrical circuit substrates is disclosed.
2. Field of the Invention
The field of this invention, in general, is plating and, specifically, plating an electrically conductive material on surfaces, such as the hole walls, of a printed circuit substrate. The field of the invention is more particularly defined as relating to electrically conductive plating on rigid or flexible insulating circuit substrates having high aspect ratio holes therein. Aspect ratio, as used herein, is defined as the hole diameter to printed circuit substrate thickness, and high means that the ratio is in excess of four (4) or five (5) to one (1).
3. Description of the Prior Art
It is commonly known to formulate electrically conductive printed circuits on an insulative material in the form of a thin, flat layer (such as a layer of epoxy-glass or other comparable insulative material). One or more layers of electrically conductive material are formed in an electrical surface configuration on the insulative material. In its most common configuration, a flat, rigid layer of epoxy-glass material forms the insulative substrate and a double-sided, customly-designed copper configuration is the electrically conductive material. To mount electrical circuit components on the printed circuit board, a plurality of small holes, conforming to a component's mounting pattern, are drilled through the circuit board. Well-known soldering techniques mechanically and electrically secure the component's mounting leads to the walls of the hole to provide a completed electrical circuit on the printed circuit board. It is a common industry requirement that the walls of the holes and the board's surface must both be copper plated to a uniform and a minimum depth of at least 0.001 inches.
As technology has advanced, the number, size and density of the mounting holes have changed rather dramatically. Most notably, the diameter of the holes has decreased and the numbers of such holes per unit area of the board's surface has increased. A hole having, for example, a 0.009 inch diameter drilled through a substrate of 0.090 inch thickness has an aspect ratio of 10:1 (hereinafter called a "10:1" hole). These high aspect ratio holes are increasing in importance in today's advanced technology. Conventional plating techniques by very good quality printed circuit houses do not achieve satisfactory plating of 6:1 or higher holes.
Another aspect of today's technology in the printed circuit industry is called an optimum plating ratio. A desired ratio of 1:1 is a recognized industry standard. This ratio is a comparison of the thickness of copper deposition on the exposed surface of the copper layer with the thickness of copper deposition on the interior surface of the walls of the hole. Since the exposed copper area more readily receives copper deposition than does the innermost wall area of a hole, the 1:1 ratio is difficult to attain.
Suffice it to say at this point that high aspect ratio holes at a 1:1 ratio in prior art plating techniques have not been achieved. Such prior art attempts are hindered by "Dog Boning." "Dog Boning" creates a non-uniform copper buildup at the edges of the wall of the hole on the substrate. The non-uniform build up results primarily from a high electro-deposition current which is present at the edges of the hole. A concentration of high current at the transverse edges of the hole results in a surplus of electro-deposited copper at those edges as compared to the middle area of the hole's wall. Moreover, the build-up itself progressively hinders the internal deposition process until, in extreme instances, the hole becomes blocked. Such prior art boards do not meet the quality control requirements for today's technology.
Production speed in some printed circuit plating houses is achieved by employing a pressurized manifold submerged in an electrolyte plating tank. High amperage levels are employed in an attempt to enhance the deposition speed of copper to the 0.001 inch minimum required on printed circuit boards. As an incident to such high speed production, attempts have been made to use a sheet-shaped pressure manifold that is provided with a customized hole pattern which precisely matches the hole pattern in the flat surface of the printed circuit to be coated. The theory is that the pressure will force electrolyte through the holes and thus the walls of the hole will be uniformly plated. Such custom drilled manifolds are extremely costly to produce. Any change in the hole pattern or board dimensions results in a costly redesign of the manifold. Additionally, any misalignment of the board holder relative to the submerged custom-drilled manifold causes the high pressure near the hole locations to be misdirected into perpendicular spraying against the board's surface. Non-uniform and unacceptable plating often results.
In another prior art system, manifolds are placed on opposite sides of a board which is connected to receive a high amperage current. The deposition current in the industry is related to the square footage of the board. In the prior art, approximately 90 amperes per square foot ("ASF") is employed together with a positive pressure system. This prior art is called high impingement rate plating. The impingement is caused by a positive pressure applied to one or both of the manifolds. In some instances, one manifold has a positive pressure while the opposing in-line manifold has a negative pressure. In some systems a plurality of opposing manifolds stagger the positive and negative pressures so that adjacent in-line opposing manifold pairs alternate between positive and negative pressures. It is believed that the high amperage and the positive pressure blasting of electrolyte against the board's surface has prevented this prior art approach from achieving the novel results of the present invention.
In summary, the aforementioned prior art approaches are not only costly but are ineffective in achieving uniform minimum 1:1 plating on substrates with high aspect ratio holes, of about 5:1 and higher.